In a conventional multi-core processor system, when a scheduler receives an instruction for the assignment of a task, the scheduler determines to which central processing unit (CPU) the task is to be assigned (see, e.g., Japanese Laid-Open Patent Publication Nos. H02-33650 and 2005-267635, and Japanese Patent No. 3429582). For example, one method of making such a determination is known where the scheduler identifies the CPU having the lowest load among CPUs making up the multi-core processor and assigns the task to the CPU having the lowest load.
Tasks include tasks that are synchronized with a different task and tasks that are not synchronized with a different task. For example, a task related to moving picture reproduction (hereinafter “moving picture reproducing task”) starts a task concerning moving picture decoding (hereinafter “moving picture decoding task”) and a task concerning audio decoding (hereinafter “audio decoding task”). A case is assumed where a moving picture decoding task is assigned to one CPU and an audio decoding task is assigned to a different CPU. To combine the result of moving picture decoding and the result of audio decoding when moving pictures are reproduced at 30 frames per second (FPS), a synchronizing process is carried out between the CPUs at a frequency of 30 times per second (see, e.g., Japanese Patent Application No. H06-1464).
However, a problem arises in that if a task that is not synchronized with either task is assigned to the CPU to which the moving picture decoding task is assigned or to the CPU to which the audio decoding task is assigned, a stand-by time arises because of execution of a synchronizing process. This stand-by time leads to an increase in the execution time for the non-synchronized task.
The stand-by time resulting from the synchronizing process can be reduced by increasing the frequency of a clock supplied to memory shared by the multi-core processor. However, power consumption by the shared memory accounts for a large percentage of the overall power consumption by the multi-core processor. For this reason, the frequency of a clock supplied to the shared memory cannot be increased in the multi-core processor, which poses another problem.